Use 64bit machine check code for 32bit too. TBD fix and enable AMD code TBD write description Signed-off-by: Andi Kleen --- --- arch/x86/Kconfig | 24 +------------------ arch/x86/kernel/cpu/mcheck/Makefile | 3 -- include/asm-x86/idle.h | 5 ++++ include/asm-x86/mach-default/irq_vectors.h | 1 include/asm-x86/mce.h | 36 +++++++++-------------------- 5 files changed, 21 insertions(+), 48 deletions(-) Index: linux/arch/x86/kernel/cpu/mcheck/Makefile =================================================================== --- linux.orig/arch/x86/kernel/cpu/mcheck/Makefile +++ linux/arch/x86/kernel/cpu/mcheck/Makefile @@ -1,6 +1,5 @@ -obj-y = mce_$(BITS).o therm_throt.o mce_thermal.o +obj-y = mce_64.o therm_throt.o mce_thermal.o -obj-$(CONFIG_X86_32) += k7.o p4.o p5.o p6.o winchip.o obj-$(CONFIG_X86_MCE_INTEL) += mce_intel_64.o obj-$(CONFIG_X86_MCE_AMD) += mce_amd_64.o obj-$(CONFIG_X86_MCE_NONFATAL) += non-fatal.o Index: linux/include/asm-x86/mce.h =================================================================== --- linux.orig/include/asm-x86/mce.h +++ linux/include/asm-x86/mce.h @@ -1,8 +1,6 @@ #ifndef _ASM_X86_MCE_H #define _ASM_X86_MCE_H -#ifdef __x86_64__ - #include #include @@ -10,19 +8,19 @@ * Machine Check support for x86 */ -#define MCG_CTL_P (1UL<<8) /* MCG_CAP register available */ +#define MCG_CTL_P (1ULL<<8) /* MCG_CAP register available */ -#define MCG_STATUS_RIPV (1UL<<0) /* restart ip valid */ -#define MCG_STATUS_EIPV (1UL<<1) /* ip points to correct instruction */ -#define MCG_STATUS_MCIP (1UL<<2) /* machine check in progress */ - -#define MCI_STATUS_VAL (1UL<<63) /* valid error */ -#define MCI_STATUS_OVER (1UL<<62) /* previous errors lost */ -#define MCI_STATUS_UC (1UL<<61) /* uncorrected error */ -#define MCI_STATUS_EN (1UL<<60) /* error enabled */ -#define MCI_STATUS_MISCV (1UL<<59) /* misc error reg. valid */ -#define MCI_STATUS_ADDRV (1UL<<58) /* addr reg. valid */ -#define MCI_STATUS_PCC (1UL<<57) /* processor context corrupt */ +#define MCG_STATUS_RIPV (1ULL<<0) /* restart ip valid */ +#define MCG_STATUS_EIPV (1ULL<<1) /* ip points to correct instruction */ +#define MCG_STATUS_MCIP (1ULL<<2) /* machine check in progress */ + +#define MCI_STATUS_VAL (1ULL<<63) /* valid error */ +#define MCI_STATUS_OVER (1ULL<<62) /* previous errors lost */ +#define MCI_STATUS_UC (1ULL<<61) /* uncorrected error */ +#define MCI_STATUS_EN (1ULL<<60) /* error enabled */ +#define MCI_STATUS_MISCV (1ULL<<59) /* misc error reg. valid */ +#define MCI_STATUS_ADDRV (1ULL<<58) /* addr reg. valid */ +#define MCI_STATUS_PCC (1ULL<<57) /* processor context corrupt */ /* Fields are zero when not available */ struct mce { @@ -80,14 +78,8 @@ struct mce_log { #define K8_MCE_THRESHOLD_BANK_5 (MCE_THRESHOLD_BASE + 5 * 9) #define K8_MCE_THRESHOLD_DRAM_ECC (MCE_THRESHOLD_BANK_4 + 0) -#endif /* __x86_64__ */ - #ifdef __KERNEL__ -#ifdef CONFIG_X86_32 -extern int mce_disabled; -#else /* CONFIG_X86_32 */ - #include void mce_log(struct mce *m); @@ -114,8 +106,6 @@ extern atomic_t mce_entry; extern void do_machine_check(struct pt_regs *, long); extern int mce_notify_user(void); -#endif /* !CONFIG_X86_32 */ - typedef void (*cpu_specific_smp_thermal_interrupt_callback_t)(void); Index: linux/arch/x86/Kconfig =================================================================== --- linux.orig/arch/x86/Kconfig +++ linux/arch/x86/Kconfig @@ -559,7 +559,7 @@ config MCE_NOTIFY config X86_MCE_INTEL def_bool y prompt "Intel MCE features" - depends on X86_64 && X86_MCE && X86_LOCAL_APIC + depends on X86_MCE && X86_LOCAL_APIC help Additional support for intel specific MCE features such as the thermal monitor. @@ -567,31 +567,11 @@ config X86_MCE_INTEL config X86_MCE_AMD def_bool y prompt "AMD MCE features" - depends on X86_64 && X86_MCE && X86_LOCAL_APIC + depends on X86_MCE && X86_LOCAL_APIC && !X86_VISWS help Additional support for AMD specific MCE features such as the DRAM Error Threshold. -config X86_MCE_NONFATAL - tristate "Check for non-fatal errors on AMD Athlon/Duron / Intel Pentium 4" - depends on X86_32 && X86_MCE - help - Enabling this feature starts a timer that triggers every 5 seconds which - will look at the machine check registers to see if anything happened. - Non-fatal problems automatically get corrected (but still logged). - Disable this if you don't want to see these messages. - Seeing the messages this option prints out may be indicative of dying - or out-of-spec (ie, overclocked) hardware. - This option only does something on certain CPUs. - (AMD Athlon/Duron and Intel Pentium 4) - -config X86_MCE_P4THERMAL - bool "check for P4 thermal throttling interrupt." - depends on X86_32 && X86_MCE && (X86_UP_APIC || SMP) && !X86_VISWS - help - Enabling this feature will cause a message to be printed when the P4 - enters thermal throttling. - config VM86 bool "Enable VM86 support" if EMBEDDED default y Index: linux/include/asm-x86/mach-default/irq_vectors.h =================================================================== --- linux.orig/include/asm-x86/mach-default/irq_vectors.h +++ linux/include/asm-x86/mach-default/irq_vectors.h @@ -50,6 +50,7 @@ #define CALL_FUNCTION_VECTOR 0xfb #define THRESHOLD_APIC_VECTOR 0xfa +#define THRESHOLD_APIC_VECOTR 0xf9 #define THERMAL_APIC_VECTOR 0xf0 /* * Local APIC timer IRQ vector is on a different priority level, Index: linux/include/asm-x86/idle.h =================================================================== --- linux.orig/include/asm-x86/idle.h +++ linux/include/asm-x86/idle.h @@ -8,6 +8,11 @@ struct notifier_block; void idle_notifier_register(struct notifier_block *n); void enter_idle(void); + +#ifdef CONFIG_X86_32 +static inline void exit_idle(void) {} +#else void exit_idle(void); +#endif #endif